Dnotitia Begins Testing VDPU ASIC Samples

Dnotitia Inc. announced in a press release that its first Vector Data Processing Unit ASIC samples have returned from fabrication and are undergoing chip characterization. The company also presented a server architecture using VDPU cards for vector retrieval in retrieval augmented generation and agentic AI at AI Infra Summit 2026.

A server with four VDPU cards delivered up to 5.77 times the vector search throughput of a dual socket CPU only server on Dnotitia's FPGA evaluation platform. In a 4,096 dimensional multimodal workload, it reduced host CPU use during index building by 92% and host memory use by 73%. Dnotitia said these results do not represent final ASIC performance.

The FPGA platform supports FAISS, Milvus and hnswlib across several index types. Dnotitia plans to begin evaluations using VDPU ASICs in the fourth quarter of 2026 and is targeting up to 10 times the vector search performance of a CPU based server.