DustPhotonics Expands Silicon Photonics Portfolio with New 2xFR4 Products

Apr 1, 2025
DustPhotonics has introduced the Tamar200 and Tamar Photonic Integrated Circuits, designed for AI and hyperscale data centers, featuring industry-first merchant 1.6T-2xFR4 and 800G-2xFR4 products.
DustPhotonics Expands Silicon Photonics Portfolio with New 2xFR4 Products

DustPhotonics has announced the expansion of its silicon photonics portfolio with the introduction of the Tamar200 and Tamar Photonic Integrated Circuits (PICs), announced in a press release. These new products are designed to enhance performance, density, and power efficiency in AI workloads and hyperscale data centers.

The Tamar200 is noted as the industry's first merchant 1.6T-2xFR4 PIC, supporting two transmit channels of 800G-FR4, with each optical lane operating at 200Gb/s per lane. Similarly, the Tamar PIC offers two transmit channels of 400G-FR4, operating at 100Gb/s per lane. Both products feature a low-loss athermal integrated multiplexer and DustPhotonics' proprietary low-loss Mach-Zehnder Modulator technology, which eliminates the need for a Thermoelectric Cooler, thereby improving system efficiency.

These PICs are designed for use in high-density modules such as OSFP and can be applied in fully retimed (DSP), Linear Pluggable Optics (LPO), and Linear Receive Optics (LRO) applications, with a reach of up to 2km. The chips will be available for sampling later this month and will be showcased at the OFC Trade Show in San Francisco from April 1-3, 2025.

We hope you enjoyed this article

Consider subscribing to one of our newsletters like Silicon Brief or Daily AI Brief.

Also, consider following us on social media:

AI Chips & Datacenters AI Brief AI Brief (X)
Free newsletter

Silicon Brief

Weekly coverage of AI hardware developments including chips, GPUs, cloud platforms, and data center technology.

AI Token Webinar

Whitepaper

Tensordyne Napier: What If One Rack Could Do the Work of Nine?

Tensordyne

This Tensordyne whitepaper presents Napier, an inference-focused AI processor and rack-scale system based on the company’s TDN Math logarithmic number system. It examines infrastructure requirements for large mixture-of-experts and agentic models, compares major inference architecture approaches, and details the TDN AIP processor, TDN72 pod, TDN Link fabric, and Napier Ultra configuration. The paper reports simulation-based performance, cost, and accuracy-validation results, including Tensordyne’s projected comparison of one Napier rack with a nine-rack Nvidia Rubin plus Groq deployment; the chip is reported as taped out and in fabrication.

Read more

You may also like

Free, six days a week

Daily AI Brief: the AI news that matters, in your inbox.