FotoNation and SEMIFIVE Partner on TriSilica AI Chip Development Using Samsung Foundry Process
FotoNation and SEMIFIVE have announced a strategic collaboration for the turnkey development of TriSilica, FotoNation’s perceptual AI chip family, according to a press release.
Under the agreement, SEMIFIVE will lead the full development process for TriSilica, which is designed for low power sensor fusion in edge AI applications. The TriSilica platform supports multimodal sensor inputs such as audio, millimeter wave, spectral, infrared, and RGB.
The first product in the series, the TS-210, is scheduled for a Multi-Project Wafer shuttle at the end of the year. Fabrication will use Samsung Foundry's 8nm Low Power Ultimate process. This partnership marks SEMIFIVE’s first European project and expands its presence beyond Asia and North America.
We hope you enjoyed this article
Consider subscribing to one of our newsletters like Enterprise AI Brief, Silicon Brief or Daily AI Brief.
Also, consider following us on social media:
More from Enterprise
Oct 16 McGraw Hill Adds AI Study Tools to Connect Oct 16 RapidCanvas Raises $29 Million to Expand Enterprise AI Platform Oct 16 Goodweek Raises $12 Million for AI Management Platform Oct 16 ALTOUR Unveils AI Platform for Corporate Travel Decisions Oct 16 BOC Group Adds AI Assistant to ADOIT 21More from Data Centers
Oct 16 EverWind Plans 420 Megawatt AI Data Centre in Nova Scotia Oct 16 Gartner Says $3.5 Trillion in AI Infrastructure Spending Faces Impairment Risk by 2030 Oct 16 KBRA Rated Anthropic BB+ Before $35 Billion Chip Financing Oct 16 China Proposes Export Controls for Advanced AI Models and Chips Oct 16 Hitachi Energy and Ansaldo Energia Partner on Data Center Power SystemsSilicon Brief
Weekly coverage of AI hardware developments including chips, GPUs, cloud platforms, and data center technology.
Whitepaper
Tensordyne Napier: What If One Rack Could Do the Work of Nine?
Tensordyne
This Tensordyne whitepaper presents Napier, an inference-focused AI processor and rack-scale system based on the company’s TDN Math logarithmic number system. It examines infrastructure requirements for large mixture-of-experts and agentic models, compares major inference architecture approaches, and details the TDN AIP processor, TDN72 pod, TDN Link fabric, and Napier Ultra configuration. The paper reports simulation-based performance, cost, and accuracy-validation results, including Tensordyne’s projected comparison of one Napier rack with a nine-rack Nvidia Rubin plus Groq deployment; the chip is reported as taped out and in fabrication.
Read moreYou may also like
SEMIFIVE signs $52 million AI accelerator contract
Synopsys and TSMC Expand AI Chip Design Partnership
Great Lakes Semiconductor Starts ChipForge Vehicle Sensor Project
M31 and Ambiq Develop Low Power Chip IP for TSMC N12e
Valens and onsemi Develop Integrated Automotive Camera Sensor
Daily AI Brief: the AI news that matters, in your inbox.