Huawei Unveils UnifiedBus Architecture for AI Clusters

Huawei unveiled its UnifiedBus interconnect architecture at HUAWEI CONNECT 2026 in Shanghai, the company said in a press release. The architecture connects processors, memory and storage across SuperPoDs and large AI clusters.

UnifiedBus combines more than 10 interconnect protocols. Huawei says it raises bandwidth from about 100 GB/s to the terabyte per second range and reduces round trip latency from 7 microseconds to 2 microseconds. It also provides global memory addressing and shared resource pools for CPUs, NPUs, memory and SSDs.

New hardware includes the cable free UnifiedBus LinkBlade for connections inside cabinets, the 176 port UnifiedBus LinkDevice with 1.6 Tbit/s of bandwidth per port, and the UnifiedBus UBG switch. The switch supports fan out of up to 1,024 and expansion toward SuperClusters containing one million NPUs.

Huawei also introduced an AI SuperCluster combining TaiShan 950 and Atlas 960 SuperPoDs, OceanStor M900 memory storage and a Xinghe UBG switch. UnifiedBus based appliances with one to eight NPUs will support local use of trillion parameter models.