NVIDIA CEO Jensen Huang to Deliver Keynote at COMPUTEX 2026

Apr 21, 2026
NVIDIA CEO Jensen Huang will present the company's latest AI innovations at COMPUTEX 2026 in Taipei on June 1, ahead of GTC Taipei, which runs June 2 to 4.
NVIDIA CEO Jensen Huang to Deliver Keynote at COMPUTEX 2026

NVIDIA CEO Jensen Huang will deliver a keynote at COMPUTEX 2026 in Taipei, where he is expected to announce the company's latest advancements in artificial intelligence and highlight its ecosystem partners. The event was announced in a press release by TAITRA, a co-organizer of COMPUTEX.

The keynote will take place at the Taipei Music Center at 11 a.m. Taiwan Time on June 1 (8 p.m. Pacific Time on May 31). It will be livestreamed, with a replay available on NVIDIA's website. The presentation will cover NVIDIA's approach to scaling AI, described as its "Five-Layer Cake," which spans from energy systems to applications.

Following the keynote, NVIDIA will host GTC Taipei from June 2 to June 4 at the Taipei International Convention Center. The conference will include technical sessions, demonstrations, and ecosystem meetups focused on physical AI, agentic systems, and inference technologies.

COMPUTEX 2026 will run from June 2 to June 5 across multiple venues in Taipei, featuring 1,500 exhibitors from around the world. Registration for NVIDIA GTC Taipei opened on April 21.

We hope you enjoyed this article

Consider subscribing to one of our newsletters like Enterprise AI Brief, Silicon Brief or Daily AI Brief.

Also, consider following us on social media:

Enterprise AI AI Chips & Datacenters AI Brief AI Brief (X)
Free newsletter

Silicon Brief

Weekly coverage of AI hardware developments including chips, GPUs, cloud platforms, and data center technology.

AI Token Webinar

Whitepaper

Tensordyne Napier: What If One Rack Could Do the Work of Nine?

Tensordyne

This Tensordyne whitepaper presents Napier, an inference-focused AI processor and rack-scale system based on the company’s TDN Math logarithmic number system. It examines infrastructure requirements for large mixture-of-experts and agentic models, compares major inference architecture approaches, and details the TDN AIP processor, TDN72 pod, TDN Link fabric, and Napier Ultra configuration. The paper reports simulation-based performance, cost, and accuracy-validation results, including Tensordyne’s projected comparison of one Napier rack with a nine-rack Nvidia Rubin plus Groq deployment; the chip is reported as taped out and in fabrication.

Read more

You may also like

Free, six days a week

Daily AI Brief: the AI news that matters, in your inbox.