Open Compute Project Expands Open Chiplet Ecosystem with Arm and Eliyan Contributions
The Open Compute Project Foundation has announced major additions to its Open Chiplet Economy, including new contributions from Arm and Eliyan, announced in a press release. These updates introduce the Foundation Chiplet System Architecture (FCSA) and BoW 2.0 enhancements aimed at improving interoperability and performance for AI and high-performance computing (HPC) workloads.
The Arm-led Foundation Chiplet System Architecture provides a vendor-neutral baseline for partitioning monolithic systems into interoperable chiplets, supporting processors, memory, I/O, and accelerators across architectures. The specification is designed to help system-in-package designers reuse chiplets, streamline validation tools, and reduce reliance on proprietary standards.
Eliyan contributed updates to the OCP Chiplet Interconnect Specification (BoW 2.0), targeting high-bandwidth memory use cases. The enhancements add support for dynamic bidirectional data, error correction, and clock alignment options suitable for advanced memory applications such as HBM4, which demands bandwidths of up to 2TB/s.
These contributions expand the Open Chiplet Economy initiative launched in 2024, which includes a chiplet marketplace cataloging components, design tools, and services. The new specifications are intended to foster open, interoperable silicon design for scalable AI and HPC systems.
We hope you enjoyed this article
Consider subscribing to one of our newsletters like Silicon Brief or Daily AI Brief.
Also, consider following us on social media:
More from Data Centers
Oct 16 EverWind Plans 420 Megawatt AI Data Centre in Nova Scotia Oct 16 Gartner Says $3.5 Trillion in AI Infrastructure Spending Faces Impairment Risk by 2030 Oct 16 KBRA Rated Anthropic BB+ Before $35 Billion Chip Financing Oct 16 China Proposes Export Controls for Advanced AI Models and Chips Oct 16 Hitachi Energy and Ansaldo Energia Partner on Data Center Power SystemsSilicon Brief
Weekly coverage of AI hardware developments including chips, GPUs, cloud platforms, and data center technology.
Whitepaper
Tensordyne Napier: What If One Rack Could Do the Work of Nine?
Tensordyne
This Tensordyne whitepaper presents Napier, an inference-focused AI processor and rack-scale system based on the company’s TDN Math logarithmic number system. It examines infrastructure requirements for large mixture-of-experts and agentic models, compares major inference architecture approaches, and details the TDN AIP processor, TDN72 pod, TDN Link fabric, and Napier Ultra configuration. The paper reports simulation-based performance, cost, and accuracy-validation results, including Tensordyne’s projected comparison of one Napier rack with a nine-rack Nvidia Rubin plus Groq deployment; the chip is reported as taped out and in fabrication.
Read moreYou may also like
Wiwynn adds AMD, cooling and optical systems to OCP showcase
Compal to Show NVIDIA AI Factory Infrastructure at OCP Summit
SUNON to Show Liquid Cooling Systems for AI Computing at OCP Summit
Synopsys and TSMC Expand AI Chip Design Partnership
IDC Raises 2029 OCP Infrastructure Spending Forecast to $800 Billion
Daily AI Brief: the AI news that matters, in your inbox.