Harmonic Expands Aristotle Into Software and Chip Verification

Oct 27, 2026
Harmonic says its Aristotle model can now verify software written in C and chip designs written in Verilog.

Harmonic is expanding its Aristotle model from mathematical proofs into software and chip design verification, Reuters reports. The model can now verify software written in C and chip designs written in Verilog.

The move comes as AI's growing use in finding software flaws draws more scrutiny. Researchers recently used AI to uncover critical bugs in PHP, which set off a global rush to patch them.

US fusion laboratory DIII-D said Aristotle rebuilt part of its reactor control software in four hours from one research paper and a 254 word prompt. Harmonic offers Aristotle with usage based pricing.

Harmonic was co-founded by Robinhood CEO Vlad Tenev and builds reasoning AI meant to reduce hallucinations. It raised $120 million last November at a $1.45 billion valuation, backed by NVentures, Sequoia and Ribbit Capital.

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