Altera Introduces Agilex 2X FPGA Portfolio for AI Systems
Altera announces in a press release Agilex 2X, a portfolio of FPGA and system on chip devices for AI infrastructure, robotics, communications, and edge systems. Software support is available in Quartus Prime 26.3, while Agilex 27 engineering samples are expected in the second half of 2027.
The portfolio includes AI tensor DSP blocks, Arm cores, high bandwidth connectivity, and security features. It also supports QuartusIQ, an AI assistant for hardware design tasks.
Agilex 2X covers four device families. Agilex 27 targets applications with intensive processing and bandwidth requirements, while Agilex 25 covers video processing, drones, and sensors. Agilex 23 supports robotics, industrial automation, and automotive systems, and Agilex 22 focuses on control, motor, security, and interface applications.
Altera claims Agilex 27 delivers 1.8 times the performance per watt of Agilex 7, SiliconANGLE reports. The launch comes as Altera prepares for a possible initial public offering after Intel sold a 51% stake to Silver Lake in April 2025.
We hope you enjoyed this article
Consider subscribing to one of our newsletters like Silicon Brief or Daily AI Brief.
Also, consider following us on social media:
More from Data Centers
Oct 29 Malaysia Seizes 30 Servers With Advanced AI Chips Oct 29 Samsung quarterly profit tops KRW 100 trillion on AI memory demand Oct 29 Oracle Forecasts $30 Billion in Free Cash Flow by Fiscal 2029 Oct 28 Prometheus Drops $500 Million Wyoming Data Center Plan Oct 28 KLA Reports $4.14 Billion Quarterly Revenue as AI Chip Demand GrowsSilicon Brief
Weekly coverage of AI hardware developments including chips, GPUs, cloud platforms, and data center technology.
Whitepaper
Tensordyne Napier: What If One Rack Could Do the Work of Nine?
Tensordyne
This Tensordyne whitepaper presents Napier, an inference-focused AI processor and rack-scale system based on the company’s TDN Math logarithmic number system. It examines infrastructure requirements for large mixture-of-experts and agentic models, compares major inference architecture approaches, and details the TDN AIP processor, TDN72 pod, TDN Link fabric, and Napier Ultra configuration. The paper reports simulation-based performance, cost, and accuracy-validation results, including Tensordyne’s projected comparison of one Napier rack with a nine-rack Nvidia Rubin plus Groq deployment; the chip is reported as taped out and in fabrication.
Read moreYou may also like
Agile Robots Plans Up to 2,000 Humanoids With NVIDIA in 2027
Argentum AI Seeks $5 Billion to Finance AI Chips
QuickLogic secures eFPGA contract for automotive and industrial SoC
Applied Optoelectronics Shows AI Network Tools and 25G Optics at SCTE TechExpo
Xsight Labs Introduces 25 Watt E1L DPU for Edge Systems
Daily AI Brief: the AI news that matters, in your inbox.